Hybrid Event

Event program

Thursday, 5/23/2024 9:00 AM - 1:00 PM, Bellavista, Grand hotel Adriatic, Opatija 9:00 AM - 1:00 PM Papers  1. D. Capista (IHP- Leibniz Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany), R. Lukose (IHP-Leibniz Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany), F. Majnoon (IHP- Leibniz Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany), M. Lisker (Technical University of Applied Science Wildau, Wildau, Germany), C. Wenger (BTU Cottbus Senftenberg, Cottbus, Germany), M. Lukosius ( IHP- Leibniz Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany) Optimization of the Metal Deposition Process for the Accurate Estimation of Low Metal-Graphene Contact-Resistance  Reducing the value of the contact-resistance and its precise evaluation are some of the greatest challenges related to the realization of performant graphene-based devices. The large effort made in the past years allowed to constantly reach lower and lower values of contact resistance. At this point classical evaluation techniques such as the Transfer Length Method (TLM), can be inaccurate because the growing contribution of the structure’s metal resistance can no longer be neglected. Furthermore, the realization of graphene devices using standard Si CMOS pilot lines add extra limitations on the types and maximum amount of metal that can be deposited. Keeping in mind these problematics we studied the effect that different metal depositions can have on the metal resistance values of our TLM structures. We further investigate the effects of such metal resistances can have on the evaluation of the metal-graphene contact resistance. 2. J. Schwarberg (Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen, Germany), R. Karhu, B. Kallinger, M. Rommel (Fraunhofer IISB, Erlangen, Germany), R. Schmidt, J. Schulze (Friedrich-Alexander-Universität Erlangen-Nürnberg, Erlangen, Germany) Investigation of CMOS Single Process Steps on 4H-SiC a-Plane Wafers for Quantum Applications  The crystal orientation of 4H-SiC a-plane (11-20) wafers allows efficient optical readout of silicon vacancies across the surface of the wafer. This sparks significant interest in utilizing a-plane wafers for quantum applications. Given the distinct properties of a-plane wafers compared to conventional c-plane (0001) wafers, well established CMOS process steps require re-evaluation to ensure a fully functional CMOS process and comparable electrical properties. In epitaxial growth, the layer-by-layer growth on a-plane substrates leads to a smooth surface with a roughness of 0.08 nm. The incorporation of dopants is sevenfold increased, compared to c-plane substrates. For ion implantation on a-plane wafers, the 30° periodicity of (11-20) and (1-100) directions induces extended channeling, creating a 2D ion implantation profile with flanks in the ±30° directions from the intended doping profile. For thermal oxidation a sixfold increased linear rate constant on a-plane wafers led to increased oxide growth rate in the reaction-limited regime. 3. M. Ley, J. Dick, J. Schulze (University of Erlangen–Nuremberg, Erlangen, Germany) Ab Initio Calculations to Determine Tunneling Parameters for 4H-SiC Tunneling Field-Effect Transistor Simulations  TFETs are a type of transistor that switches band-to-band tunneling currents. Such devices are promising candidates for future integrated circuits, low-power electronics, and quantum applications. Device simulations of TFETs with the non-local tunneling model require material-specific parameters to correctly describe the band-to-band tunneling process. The material-specific parameters can be determined by atomistic simulations. These ab initio calculations allow fast and efficient determination of material-specific parameters without experimental input. This process is demonstrated for 4H-SiC, which is an indirect semiconductor with a large band gap to the direct conduction band valley. In 4HSiC, phonon-assisted tunneling is the dominant tunneling process. For the validation of the simulated parameters, TCAD simulations of transfer characteristics are compared with those of measured devices. 4. M. Bendra, R. Orio, S. Selberherr (Institute for Microelectronics, TU Wien, Vienna, Austria), W. Goes (Silvaco Europe Ltd., Cambridge, United Kingdom), V. Sverdlov (Institute for Microelectronics, TU Wien, Vienna, Austria) Influence of Interface Exchange Coupling in Multilayered Spintronic Structures  The investigation of the influence of interface exchange coupling on multilayered structures reveals critical insights into the performance and reliability of spintronic devices. The study focuses on how the exchange coupling, mediated by non-magnetic layers, affects the magnetic interaction between adjacent ferromagnetic layers, impacting their overall magnetic stability and domain wall motion. This is particularly relevant in the context of spin-transfer torque phenomena, where the efficiency of spin current-induced switching is paramount. Our research highlights the potential for optimizing the exchange coupling to enhance the performance of multilayered spintronic devices. This can lead to improvements in the data retention and write-read speeds of memory devices, as well as enhanced thermal stability, which is critical as device dimensions continue to shrink in the nanoscale regime. 5. B. Pruckner, N. Jørstad, T. Hadámek (Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic, Institute for Microe, Vienna, Austria), W. Goes (Silvaco Europe Ltd., Cambridge, United Kingdom), S. Selberherr (Institute for Microelectronics, TU Wien, Vienna, Austria), V. Sverdlov (Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic, Institute for Microe, Vienna, Austria) Field-free Perpendicular Magnetization Switching of SOT-MRAM Devices by Magnetic Spin Hall Effect  Spin-orbit torque magnetoresistive random access memory (SOT-MRAM) devices take advantage of the current induced SOTs mainly generated through the spin Hall effect (SHE) in order to achieve sub-ns switching speed and high endurance. However, to achieve deterministic switching of magnetic layers with an initial perpendicular magnetization, an external magnetic field is necessary. The magnetic spin Hall effect (MSHE) in antiferromagnets can be utilized to overcome this limitation and achieve field-free SOT switching. We employ a fully three-dimensional model coupling charge, spin and magnetization dynamics to study the switching behavior of SOT-MRAM devices. SOTs are included by considering the charge-to-spin current transversion coefficients reported for Mn3Sn and MnPd3 antiferromagnets. We demonstrate the generation of out-of-plane spin current by in-plane charge current due to MSHE in a magnetic tunnel junction (MTJ). The spin current drives out-of-plane anti-damping-like torques leading to deterministic switching of the adjacent perpendicularly magnetized CoFeB magnetic free layer. The proposed device requires no external magnetic field and lower current densities, compared to conventional SHE-driven SOT-devices. 6. D. Novaković, I. Berdalović, T. Suligoj (Faculty of Electrical Engineering and Computing, Zagreb, Croatia) Impact of Buffer Al-Content on 2DEG Mobility and Scattering Mechanisms in Double-Heterostructure GaN HEMTs  This paper investigates the dependence of two-dimensional electron gas (2DEG) mobility in GaN-based double-heterostructure high electron mobility transistors (HEMTs) on aluminum content in the AlGaN buffer layer. Our model uses the momentum relaxation time approximation for numerical calculations of low-field electron mobility, with all relevant scattering mechanisms taken into account. The simulations carried out confirm that carrier mobility is predominantly influenced by polar optical phonon (POP) and interface roughness (IFR) scattering. For that reason, further analysis focused on these two scattering mechanisms, revealing opposite trends in their impact on carrier mobility with varying buffer Al-content. Additionally, the paper discusses the impact of the changes in quantum confinement due to varying buffer Al-content, and establishes a direct connection between quantum confinement and POP/IFR scattering rates, offering comprehensive insights into their interdependences. The findings underline the importance of optimizing buffer aluminum content in AlGaN/GaN/AlGaN heterostructures to achieve higher carrier mobility by finding the optimal trade-off between scattering mechanisms. 7. M. Matić, M. Poljak (Faculty of Electrical Engineering and Computing, Zagreb, Croatia) Validity of the Ballistic Top-of-the-Barrier Model for FETs Based on 2D Material Nanoribbons  We investigate our in-house implementation of the non-equilibrium Green’s function (NEGF) formalism in combination with the top-of-the-barrier (ToB) ballistic model, as implemented in our QUDEN (from Quantum-transport Device Engineering in Nanoelectronics) simulator. We calibrate QUDEN on self-consistent NEGF-Poisson simulations of graphene nanoribbon (GNR) field-effect transistor (FET) with ~15 nm channel in the commercial software QuantumATK. It is demonstrated that QUDEN device predicting ability is adequate for nanoribbon-based FETs, except in materials with ultra-low effective mass. QUDEN is then employed to explore monolayer zirconium-disulfide (ZrS2) nanoribbon (ZrS2NR) nFETs, using Hamiltonians from density functional theory (DFT) calculations. We show that ZrS2NR nFET exhibits 32% lower ON-state current compared to GNR nFET, which is attributed to 36% higher electron effective mass in ZrS2NRs than in GNRs. Our results show that DFT-based Hamiltonians and NEGF-ToB model can be efficiently used for accurate investigation of nanoribbon-based devices. 8. T. Vukadin, M. Matić, M. Poljak (Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia) Investigation of the One-Dimensional Semiconductor I4Si2 as a FET Channel Material  One-dimensional (1D) semiconductor I4Si2 is analyzed in terms of its appropriateness as a channel material for gate-all-around field-effect transistor (GAA FETs). We combine wannierized Hamiltonians obtained from density-functional theory (DFT) calculations with Green’s function formalism to explore the electronic and transport properties of I4Si2, and ballistic performance of I4Si2 GAA FETs. We find that I4Si2 GAA FET exhibits a high ballistic ON-state current of 3.13 mA/μm with an ON-OFF switching ratio of ~3  105, which fulfils the requirements of IEEE International Roadmap for Devices and Systems (IRDS). These findings are supported and explained by examining the band structure, transmission, density of states, channel charge density, total and quantum capacitance, and electron injection velocity in the 1D semiconductor I4Si2. 9. J. Jaram, M. Matić, M. Poljak (Faculty of Electrical Engineering and Computing, University of Zagreb, Zagreb, Croatia) Impact of Vacancies on the Transport Properties of Monolayer Germanium-Sulfide Nanoribbons  Quantum transport simulations are employed to investigate the impact of vacancies on the transport properties of monolayer germanium-sulfide (GeS) nanoribbons (GeSNRs). We statistically investigate the impact of vacancy percentage (PV) on the transmission, transport gap, and electron and hole conductance of GeSNRs. We show that the increase of PV significantly degrades the transmission, especially near the conduction band minimum and valence band maximum that are the most important for transport in electron devices. Furthermore, a linear increase of the transport gap with PV is reported, with 0.02 eV increase of the gap per 1% of PV. Finally, carrier conduction shows a hyperbolic decreasing dependence on PV with conductance lowered by as much as ~5× in GeSNRs with only 1% of vacancies. 10. M. Lukosius, R. Lukose, P. Dubey, A. Raju, D. Capista, M. Lisker, A. Mai, C. Wenger (IHP– Leibniz-Institut für innovative Mikroelektronik, Frankfurt Oder, Germany) Graphene for Photonic Applications  Integrating graphene into Silicon Complementary Metal-Oxide-Semiconductor (CMOS) technology for photonic applications holds immense promise, but it encounters challenges in establishing large-scale graphene processes. These challenges encompass growth through techniques like Chemical Vapor Deposition (CVD), transfer, encapsulation, and contact formation within a routine 200mm wafer pilot line typically utilized for integrated circuit fabrication. This study is dedicated to exploring various facets of graphene research within a 200 mm pilot line, with a focus on overcoming challenges through the fabrication of proof-of-concept photonic graphene-based devices. The synthesis of graphene targeted epi-Ge(100)/Si(100) substrates, grown within the IHP pilot line, showcasing the potential for high-quality graphene deposition across 200mm wafers. Alternatively, employing different orientations such as (110) has been explored to enhance graphene mobility, achieving a remarkable mobility of 2300 cm2/Vs at present. The study systematically investigates graphene quality, thickness, and homogeneity utilizing techniques such as Raman spectroscopy, Atomic Force Microscopy (AFM), and Scanning Electron Microscopy (SEM). Additionally, simulations and fabrication of the graphene ring modulators have been conducted at both the component and device levels, incorporating realistic graphene properties. These results indicate a modulation depth of 1.6 dB/μm and a 3dB bandwidth of 7 GHz, showcasing the potential of graphene-based photonic devices for high-speed communication applications. 11. B. Požar, I. Berdalović, P. Bartulović, M. Jugović, T. Suligoj (Fakultet elektrotehnike i računarstva, Zagreb, Croatia) Temperature-Dependent Noise Performance of Single-Photon Avalanche Diodes and Active Quenching Circuits in 180-nm HV CMOS  The paper describes the temperature characterization of single-photon avalanche diodes (SPADs) and active quenching circuits (AQCs) designed and fabricated in a commercial 180-nm high-voltage (HV) bipolar-CMOS-DMOS (BCD) technology. The SPAD structures utilize a deep, low-doped p-n junction as the avalanche multiplication layer, exploiting the high-voltage implant layers available in the technology. Different SPAD layouts (circular and square) are characterized in terms of current-voltage (I-V) curves, breakdown voltage, dark count rates (DCR), and afterpulsing for the temperature range from 250 to 350 K. We find that the square-shaped SPAD connected to an off-chip passive quenching circuit (PQC) exhibits a significantly higher afterpulsing probability at high excess voltages compared to the circular structure, particularly at low temperatures. The SPADs were connected to an active quenching circuit (AQC) integrated in the same technology, with the aim to suppress afterpulsing and reduce the dead time. Using the AQC, the afterpulsing probability for the square structure was reduced by more than 60% at 280 K, and the maximum count rate of the detector was increased by reducing the dead time to ≈ 800 ns. The circular SPAD device cooled down to 250 K in combination with the AQC exhibits a state-of-the-art DCR of 1.4 mHz/μm^2 at an excess voltage of 5 V. 12. M. Poljak (Faculty of Electrical Engineering and Computing, Zagreb, Croatia) Quantum-Transport Exploration of Design Space for Majorana Zero Modes in Finite Kitaev Chains  Quantum transport simulations are employed to investigate the properties of short finite Kitaev chains, with a focus on exploring the possible design space. We numerically investigate how the Kitaev chain behaves when system parameters are varied and study the transport characteristics, including direct tunneling and Andreev processes. We examine how the chain length provides topological protection of Majorana zero modes (MZMs) and demonstrate how increasing the length alleviates Majorana oscillations that could be detrimental for topological quantum computing with MZMs. Thursday, 5/23/2024 3:00 PM - 7:00 PM, Bellavista, Grand hotel Adriatic, Opatija 3:00 PM - 7:00 PM Papers  1. A. Žamboki, L. Gočan (University of Zagreb, Faculty of electrical engineering, Zagreb, Croatia), J. Mikulić, G. Schatzberger, J. Fellner (ams-osram AG, Premstaetten, Austria), T. Marković, A. Barić (University of Zagreb, Faculty of electrical engineering, Zagreb, Croatia) Automated Optimal Resistance Measurement Method for Precision Resistor Stress Response Analysis  This article presents a resistance measurement method developed for stress response analysis, specifically targeting the automatic positioning of measurement points to achieve maximum precision based on the measured resistance value. The encapsulation process, involving the pouring of material over silicon chips, introduces static mechanical stress in integrated circuits (ICs) that alters their performance characteristics. To compensate for the deviations caused by the stress, previously developed stress models can be used to simulate the stress response of complex circuits. To calibrate the models, the stress characteristics of the integrated components must be measured. Here, precise measurements are required because the stress-induced changes during the operation of the IC components are predominantly small. In this paper, a mathematical proof is presented that determines the optimal voltage-current measurement point for any resistance value and any measurement instrument. In addition, a measurement method is developed that automatically positions itself at this optimal measurement point. Experimental results show that this method consistently provides highly accurate measurements for a used range of resistance values. 2. L. Gočan, A. Žamboki (University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, Croatia), J. Mikulić, G. Schatzberger, J. Fellner (ams-osram AG, Premstaetten, Austria), T. Marković, A. Barić (University of Zagreb, Faculty of Electrical Engineering and Computing, Zagreb, Croatia) Analysis of Wheatstone Bridge Sensitivity for Applications in Integrated Piezoresistive Stress Sensors  The Wheatstone bridge configuration of sensing elements is often used in stress measurements due to its simple architecture and relatively high linearity and sensitivity when used in a full-bridge configuration. The sensitivity of the Wheatstone bridge is influenced by several factors: the initial mismatch between the resistances of the sensing elements, the inevitable resistance of the bias voltage lines, and the ratio between the sensing and bias resistances. In this paper, the effects of the aforementioned factors on the sensitivity of the Wheatstone bridge are analysed and compared to the ideal case. The bias resistances in this work originate from the transmission gates in the bias voltage lines. They are included because the sensors are intended to be used for stress mapping as elements of a matrix. Here, each sensor can be addressed individually and must be disconnected when not in use. The analysis results are confirmed by simulations that show the response of such a sensor to stress. The analysis and simulations lead to design rules and measurement methods that ensure minimum degradation of sensitivity due to the resistances in the bias voltage lines. 3. L. Giannini, R. Asquini (Sapienza, University of Rome, Rome, Italy), M. Vitelli (Sensichips srl, Aprilia, Italy), E. Piuzzi (Sapienza, University of Rome, Rome, Italy) Investigation of Wearable SENSIPLUS Chip for Bioimpedance Measurements  Bioimpedance has emerged as a versatile and non-invasive diagnostic methodology for monitoring various physiological conditions of the human body. In this context, the detailed characterization of sensors dedicated to bioimpedance measurements is crucial to ensure the accuracy and reliability of the obtained results. In this paper is proposed a comprehensive study suggesting the use of the “SENSIPLUS” chip, developed by Sensichips s.r.l., as a multifunctional microchip equipped with a precision LCR meter for low-noise impedance measurements up to 2.5 MHz, to measure inductance (L), capacitance (C) and resistance (R). Through comparative analysis with a professional LCR meter, measurements were performed on electrical circuits resembling human tissues. The reported results have a good overlap for both the resistance and reactance values, with errors well within tolerance limits. Moreover, an in-depth analysis of measurement repeatability highlights consistency and reproducibility, reinforcing the reliability of the chip in bioimpedance measurements. This study shows a promising step towards the integration of the SENSIPLUS chip as highly-accurate bioimpedance sensor in wearable devices for applications in the field of Internet of Healthy Things (IoHT). 4. S. Casalinuovo (Sapienza University of Rome, Rome, Italy), D. Caschera (CNR ISMN, Rome, Italy), A. Buzzin (Sapienza university of Rome, Rome, Italy), S. Quaranta, F. Federici (CNR ISMN, Rome, Italy), L. Zortea, A. Brotzu, V. Genova, S. Natali (Sapienza University of Rome, Rome, Italy), D. Puglisi (Linköping University, Linköping , Sweden), G. de Cesare, D. Caputo (Sapienza University of Rome, Rome, Italy) VOC Detection: Hope or Hype? A Preliminary Study to Overcome Many Challenges  VOCs are small sized by products of cellular metabolic activity, that spread in bodily fluids (as breath) and can be considered as pathophysiological biomarkers. A promising method for developing VOC sensors involves gold nanoparticles (AuNP) to create a lock-and-key system. The concentration of the target molecules bonded to the AuNP detectors can determine a change of resistance and allow to trace the VOC concentration. In this framework, we are developing a VOC sensor through AuNP synthesis and deposition on cotton, as a flexible and biodegradable substrate. An aqueous gold solution was prepared by using chloroauric acid as gold precursor and polyvinylpyrrolidone as reducing/surfactant agent. The cotton substrate was dip-coated in the solution. The optical characterization in the UV-vis range of both solution and coated cotton revealed the presence of around 20 nm diameter particles associated to a peak at 550 nm. The sample electrical characterization showed different behaviour before and after spraying a 40% ethanol solution. In particular, the presence of ethanol brought to an average change of resistance of about 5 orders of magnitude in the 1Hz-1MHz range. These preliminary results are promising for future applications concerning VOC detection for healthcare. 5. D. Vinko, M. Srnović, D. Bilandžija, L. Filipović (Fakultet elektrotehnike, računarstva i informacijskih tehnologija Osijek, Osijek, Croatia) Optimization of Transmission Distance in Symmetric Wireless Power Transfer Topology  Inductive wireless power transfer (WPT) system uses alternating magnetic field to transmit power from the transmitter to the receiver. To confine the magnetic field, WPT coils are realized with high permeability substrate material that ensures shielding. Aside from shielding, high permeability substrate also increases the coil inductance. When transmitter and receiver coils are placed in close proximity, high permeability substrate of transmitter coil increases the inductance of the receiver coil, and vice versa. This additional inductance increase is a function of the substrate material type and the distance between the coils. To achieve high efficiency and low losses of the WPT system, a capacitor network is added to both transmitter and receiver coil. In a common serial-serial (S-S) WPT system topology, the capacitor networks are asymmetric, i.e. the capacitor network of the transmitter and the receiver are not identical. The efficiency of asymmetric S-S topology is significantly impaired due to variable coil inductance. To attain high efficiency in such operating conditions, this paper proposes symmetric S-S WPT topology with emphasis on transmission distance optimization. 6. V. Mulloni (Fondazione Bruno Kessler, Trento, Italy), B. Di Ruzza (University of Foggia, Foggia, Italy), G. Marchi (Fondazione Bruno Kessler, Trento, Italy), M. Donelli, A. Quaranta (University of Trento, Trento, Italy) Flexible Nafion Sensor for Ionizing Radiation Based on a Microwave Resonating System  Monitoring of high radiation levels is the primary factor in environments with high potential radioactivity levels, where it is extremely important to have a reliable measure of the dose level to avoid human exposure or damage to the electronic circuits. There is, therefore, a real need for continuous, in situ monitoring of high radiation levels. Electronic solid-state MOS dosimeters are very precise but they fail at high radiation doses because their electronic circuits cannot survive the harsh radiation environment. To date, high doses of radiation can only be estimated post-factum using indirect radiation measurement mechanisms. In this contribution, a completely novel concept of a high-dose radiation detector is proposed overcoming the current limitations. The sensor is based on the emerging technology of chipless RFID, using Nafion 117 as a specific sensing material. Irradiation causes changes in the chemical structure of Nafion, which produces a shift in the resonating frequency of the sensor. Moreover, the sensing tag is extremely low-cost and is suitable for real-time wireless monitoring. The sensor has been tested with x-ray radiation up to 7 kGy, showing no sign of deterioration in its functioning and a frequency shift that is proportional to the irradiation dose. 7. F. Bogdanović, A. Tabaković, Ž. Osrečki (Micro and Nano Electronics Laboratory, Faculty of Electrical Engineering and Computing, University o, Zagreb, Croatia), J. Žilak (Ericsson Nikola Tesla d.d., Zagreb, Croatia), M. Koričić, T. Suligoj (Micro and Nano Electronics Laboratory, Faculty of Electrical Engineering and Computing, University o, Zagreb, Croatia) Two Port Scattering Parameters Measurements and De-Embedding in Cryostat from 300 K down to 20 K  Several methods of de-embedding scattering parameters (S-parameters) at cryogenic temperatures (CT) are compared. The optimal one that was selected is 12-term error short, open, load and thru (SOLT) method as the 1-step, 2-step and TRL de-embedding procedures exhibit errors. Short, open, load and thru structures were designed and fabricated on PCB. Each structure was placed at the reference de-embedding plane and designed to be as close to an ideal standard as possible. Analysis of short, open and thru S-parameters shows a decrease of transmission line losses with decreasing temperature. Symmetrical line termination for load structure is accomplished by using two parallel 100 Ω resistors. Impact of SMD resistor type on the characteristics of load structure is analyzed. Thin film device with the lowest tolerances and stable characteristics over temperature range from 300 K down to 20 K is found as the optimum choice. The SOLT de-embedding method is demonstrated on measured S-parameters in a frequency range from 3 MHz to 3 GHz of commercially available device, Infineon’s BFP420 bipolar transistor in temperature range from 300 K down to 20 K. 8. N. Vokic, D. Milovancev (AIT Austrian Institute of Technology, Vienna, Austria) Photomixing Techniques for mm-Wave Carrier Generation  We present an overview of some techniques used to generate high-quality electrical tones at mm-wave frequencies and beyond, focusing on their use in 6G mobile fronthaul applications. We elaborate on an example of a gain-switched optical frequency comb suitable for chip integration in mature photonic platforms. 9. A. Miloš, G. Molnar (Ericsson Nikola Tesla d.d., Zagreb, Croatia), M. Vučić (University of Zagreb Faculty of Electrical Engineering and Computing, Zagreb, Croatia) UWB Pulse Shaping Filters Forming Flat-Spectrum Gaussian Pulses  Ultra-wideband (UWB) radio utilizes narrow pulses that satisfy given spectral masks. These pulses should fill the masks efficiently. In addition, their waveforms should exhibit high energy concentrations. One class of such pulses, called flat-spectrum Gaussian pulses, has recently been developed. This class describes ideal pulses. However, their implementation in UWB pulse generators requires circuits that perform pulse shaping. One approach for such shaping is filtering. In this context, we present transfer functions of continuous time filters whose impulse responses approximate the ideal flat-spectrum Gaussian pulses. We consider the pulses with various degrees of flatness, compliant with the FCC masks. To obtain filters' transfer functions, the least-squares error criterion is used. The optimum transfer functions are found by using a known method for time-domain synthesis of continuous time systems based on second-order cone programming. They are provided in the form of zero-pole-gain models. 10. M. Krizan, I. Budanović, M. Čoti, J. Kundrata, V. Čeperić, T. Mandić, T. Marković, A. Barić (Faculty of Electrical Engineering and Computing University of Zagreb, Zagreb, Croatia) Design and Verification Challenges in SoC Integration of PicoRV32 RISC-V with Sigma-Delta ADC  This conference paper introduces an innovative System-on-Chip (SoC) architecture integrating a PicoRV32 RISC-V core with a Sigma-Delta Analog-to-Digital Converter (ADC) core, focusing on SoC verification, UVM verification of the Sigma-Delta core, and synthesis and physical implementation. The PicoRV32, a compact and efficient RISC-V CPU core, features a small footprint (750-2000 LUTs in 7-Series Xilinx Architecture), high operation frequency (250-450 MHz on 7-Series Xilinx FPGAs), and configurable modes, including optional interrupt controller, memory interface, and Co-Processor Interface (PCPI). This integration caters to the growing demand for high-performance, low-power SoCs in advanced digital systems. The paper delves into the challenges and solutions in verifying the complex interaction between the PicoRV32 core and the high-resolution Sigma-Delta ADC, employing Universal Verification Methodology for robust and reliable system performance. Additionally, it highlights strategies for optimizing SoC design, including power consumption and processing efficiency, essential for applications requiring precise data processing and control. This work contributes significantly to the SoC design field, showcasing a practical implementation of a versatile and powerful system, and provides valuable insights for SoC development advancement. 11. M. Rojnić, R. Prenc (Faculty of Engineering, University of Rijeka, Rijeka, Croatia), M. Dubravac, Z. Šimić (Faculty of Electrical Engineering, Computer Science and Information Technology, University of Osijek, Osijek, Croatia) Analyzing Standardized Inverse Time-Current Curve Types of Overcurrent Relays for Efficient Overcurrent Protection in Distribution Networks  The selection of the appropriate curve type of overcurrent relay function is significant for achieving optimal coordination of overcurrent protection in distribution networks. In this study, authors conducted a comprehensive analysis of the overcurrent relays performance regarding their different inverse time-current curve types. Additionally, different fault locations were taken into consideration. To investigate the impact of curve types on overcurrent relays coordination, authors employed a uniform curve type for all overcurrent relays in two representative power systems. The results, encompassing three standardized IEC curve types, are presented, and analyzed to illustrate the efficacy of our proposed approach. Therefore, this study underscores the critical role that curve type selection has in determining the feasibility of attaining reasonably low overcurrent relay trip times.

 
 

Marko Koričić (Croatia), Vladimir Čeperić (Croatia), Mirko Poljak (Croatia), Tomislav Markovic (Croatia)

Slavko Amon (Slovenia), Dubravko Babić (Croatia), Željko Butković (Croatia), Maurizio Ferrari (Italy), Mile Ivanda (Croatia), Branimir Pejčinović (United States), Jörg Schulze (Germany), Tomislav Suligoj (Croatia), Aleksandar Szabo (Croatia)

Milan Bjelica (Serbia), Vladimir Čeperić (Croatia), Tihomir Knežević (Croatia), Marko Koričić (Croatia), Mindaugas Lukosius (Germany), Tvrtko Mandić (Croatia), Tomislav Marković (Croatia), Bart Nauwelaers (Belgium), Mirko Poljak (Croatia), Davor Vinko (Croatia)

The discount doesn't apply to PhD students.

NOTE FOR AUTHORS: In order to have your paper published, it is required that you pay at least one registration fee for each paper. Authors of 2 or more papers are entitled to a 10% discount.

Marko Koricic
University of Zagreb
Faculty of Electrical Engineering and Computing
Unska 3
HR-10000 Zagreb, Croatia

Phone: +385 1 6129 953
GSM: +385 98 671 391
Fax: +385 1 6129 653
E-mail: marko.koricic@fer.hr

The best papers will get a special award.
Accepted papers will be published in the ISSN registered conference proceedings. Papers presented at the conference will be submitted for inclusion in the IEEE Xplore Digital Library.
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There is a possibility that the selected scientific papers with some further modification and refinement are being published in the following journals: Journal of Computing and Information Technology (CIT), MDPI Applied Science, MDPI Information Journal, Frontiers and EAI Endorsed Transaction on Scalable Information Systems.

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